(3) Microprocessor Peripheral Circuit3-3. IF-594 BOARD
The respective camera signal processing ICs are controlled
by this microprocessor (IC311). The various parametersThe CAMLINK (IC502) not has the LINK layer function
are supplied from this microprocessor (IC311) such as thethat is required by IEEE 1394 of the interface block, and
signal processing parameters that are sent to the camerathe picture memory control function that is required to
signal processing IC (IC306), and shutter speed parametersend out the image data. It also generates the various
for the electronic shutter speed control. The analogtiming pulses. The PHY-IC (IC504) is the PHY IC layer
voltage controls such as the gain setting of the gain-IC that is required by IEEE 1394 of the interface block. It
has the built-in PLL circuit that is required to send and
controlled amplifiers and the offset voltage setting of the
receive data, and to generate the communication clock.
A/D converter, are performed by feeding the digital control
The DC/DC converter block is also located in the IF-594 board.
data to the D/A converter (IC305). The power modes of
each IC are also controlled by the microprocessor (IC311).
(1) Video Signal System
To control the lens system, the zoom and focus systems are
The digital Y/C (Y/U/V) signal that is output from the
driven by transferring the serial control data from this
DCP-10 board enters the sequence alignment circuit.
microprocessor to the respective driver ICs. The lens iris
(IC502 pins-2 to -4, pins-7 to 10 and pins-12 to -15) The
is driven by converting the PWM pulse that is supplied
data aligned in IC502 is output in the form of 8-bit parallel
from pin-82 to DC signal at the LD-75 board.
data (IC502 pins-27 to -30, and pins-32 to -35). This
The microprocessor (IC311) functions also as the
output data is synchronous with the write clock (IC502
communication interface with a personal computer when
pin-37) of the picture memory IC (IC501, IC503). Writing
the personal computer is used as a picture generating
data into the memory is controlled by the control pulse
device.
(IC502 pins-38 to -40).
The default adjustment data when shipped from the
The read-out clock (IC502 pin-62) is asynchronous with
factory, and the parameters a camera must have (specifiedclock of the camera system, but is synchronous with the
by IEEE 1394) are stored in EEPROM (IC308).interface block. The read-out control pulse (IC502 pins-
The clock signal (12.288 MHz) that operates the63, -64 and -66) reads out the picture data from the
microprocessor is generated by IC502 on the IF-594 boardmemory (IC501, IC503) in the manner that conforms to the
and is waveform-shaped by an inverter (IC307). Thepicture mode (camera protocol conforming to the IEEE
microprocessor is connected with the interface block by1394) which is set by the PC.
CN302.The read-out data enters IC502 again. The packets are
generated together with PHY-IC (IC504) conforming to
(4) Lens Drive Circuitthe IEEE1394 specifications. The video data is finally
The lens drive circuit consists of the predriver IC (IC402)output to the PC via CN503.
and the current driver IC (IC401). The zoom lens and
(2) Control Signal System
focus are controlled by this circuit.
The control signal that is supplied from the PC in
The predriver IC receives the serial data from the
conformity with the IEEE 1394 specifications, is decoded
microprocessor, and outputs the pulses required by the
by CAMLINK (IC502) and sent to the microprocessor on
drive IC (IC401), and controls this IC (IC401). The drive
the DCP-10 board via CN302. The data which is output
IC sends the required signals to the lens control via
from the microprocessor is received by CAMLINK which
CN401.
sends the data to the PC using PHY-IC (IC504).
(5) Power Supply Sequence Circuit
(3) IEEE 1394 Interface Block
The microprocessor has the built-in power supply sequence
The fundamental clock (24.576 MHz) used for
circuit to order to protect the pulse driver IC (IC302) that
communication is generated by X501 and IC504. The
drives the CCD image sensor. Q301 to Q305 control ON/
frequency-doubled pulse (49.152 MHz) required for
OFF of the ?15 V power supply and the ?8.5 V power
communication with CAMLINK (IC502) and the external
supply using both of the CAM_POWER_CONT (IC311
interface (CN503), and the frequency-quadrupled pulse
pin-89) and +5 V power.
(98.307 MHz) required for the 200 M communication are
generated inside IC504.
The communication transceiver/receiver and the bias
circuits are built inside PHY-IC (IC504).
CCM-DS250
3-2 (E) |
ACEC
SONY
