12.10.M24C64WBN6 (IC309)
12.10.1.Features
? Two Wire I 2 C Serial Interface
Supports 400 kHz Protocol
? 3.3V Supply Voltage
? Write Control Input
? BYTE and PAGE WRITE (up to 32 Bytes)
? RANDOM and SEQUENTIAL READ Modes
? Self-Timed Programming Cycle
? Automatic Address Incrementing
? Enhanced ESD/Latch -Up Behavior
? More than 1M Erase/Write Cycles
? More than 40 Year Data Retention
12.10.2.Description
2
These IC -compatible electrically erasable programmable memory (EEPROM) devices are organized
2
as 8192 x 8 (M24C64) .These devices ar e compatible with the IC memory protocol. This is a two wire
serial interface that uses a bi -directional data bus and serial clock. The devices carry a built-in 4 -bit
2
Device Type Identifier code (1010) in accordance with the IC bus definition.
2
The device behaves as a slave in the IC protocol, with all memory operations synchronized by the
serial clock. Read and Write operations are initiated by a Start condition, generated by the bus master.
The Start condition is followed by a Device Select Code and RW bit, terminated by an acknowledge bit.
th
When writing data to the memory, the device inserts an acknowledge bit during the 9 bit time,
following the bus master?s 8 -bit transmission. When data is read by the bus master, the bus master
acknowledges the rece ipt of the data byte in the same way. Data transfers are terminated by a Stop
condition after an Ack for Write, and after a NoAck for Read.
SIGNAL NAMES
E0, E1, E2 Chip Enable
SDA Serial Data
SCL Serial Clock
WC Write Control
VCC Supply Voltage
VSS Ground
26
AK53 D.O.C. Service Manual 22/03/2004 |