CPU (LSI1: UPD913GF-3BA)
The 16-bit CPU contains a 1k-byte RAM, three 8-bit I/O ports, two timers, a key controller and serial interfaces.
The CPU detects key velocity by counting the time between first-key input signal FI and second-key SI from
the keyboard. The CPU reads sound data and velocity data from the sound source ROM in accordance with
the selected tone; the CPU can read rhythm data simultaneously when a rhythm pattern is selected. Then the
CPU provides 16-bit serial sound data to the DSP. The CPU also controls MIDI input/output and stores
sequencer data into the working storage RAM.
The following table shows the pin functions of LSI1.
Pin No.TerminalIn/OutFunction
1TXD0OutMIDI signal output
2RXD0InMIDI signal input
3SCK0OutAPO (Auto Power Off) signal output
4, 5TXD1, RXD2In/OutData bus for the LCD driver
6SCK1Out1 MHZ synchronizing pulse output
7AVCCInDVDD (+5 V) source
AC adaptor detection terminal.
8AN0In+5 V when the keyboard is powered by batteries and becomes
V to cancel the APO function when AC adaptor is connected.
0
9AN1NNot used. Connected to ground.
10AGNDInGround (0 V) source
11BCKOutBit clock output
12SOOutSerial sound data output
13LRCKOutWord clock output
14GNDInGround (0 V) source
15, 16XLT0, XLT1In/Out20 MHz clock input/output
17VCCIn+5 V source
18, 19MD0, MD1InMode selection terminal
20RSTBInReset signal input
21NMIInPower ON signal input
22INT/P10In/OutData bus for the LCD driver
FI0 ~ FI3
23 ~ 30InTerminal for key input signal
SI0 ~ SI3
31 ~ 38KC0 ~ KC7OutTerminal for key scan signal
FI4 ~ FI7
39 ~ 46InTerminal for key input signal
SI4 ~ SI7
FI8, FI9
47 ~ 50NNot used
SI8, SI9
51FI10InTerminal for button input signal
52SI10/P23OutChip enable signal for the LCD driver
53 ~ 55KI0 ~ KI2InTerminal for button input signal
56MWNBOutWrite enable signal for the DSP
57 ~ 76MA0 ~ MA17OutAddress bus
77MCSB0OutChip enable signal output for the sound source ROM
78MCSB1OutNot used
79MCSB2OutChip enable signal output for the DSP
N 6 N |
ACEC
CASIO
