D-F200/F201
Pin No.Pin NameI/OPin Description
71AM INIAM oscillation signal input
72VDD (1.8-2.2V)NPower supply pin
73RESETIPower reset signal input
74XOUTOCrystal oscillation signal output (75 kHz)
75XINICrystal oscillation signal input (75 kHz)
76VXTNCrystal oscillation signal pin
77VLCDNLCD voltage doubler
78, 79C1, 2NLCD voltage doubler
80VEENConstant voltage output to LCD.
Y IC601 CXD3029R (RF AMP, DIGITAL SIGNAL PROCESSOR, DIGITAL SERVO PROCESSOR, D-RAM CONTROLLER)
Pin No.Pin NameI/OPin Description
1XRASORow address strobe signal output to the D-RAM (IC602)
2XWEOData input enable signal output to the D-RAM (IC602)
3 to 6D1, D0, D3, D2I/OTwo-way data bus with the D-RAM (IC602)
7, 8TEST1, TEST2OOutput terminal for the test Not used (open)
9XCASOColumn address strobe signal output to the D-RAM (IC602)
10WFCKOWFCK signal output terminal
11 to 13A9 to A7OAddress signal output to the D-RAM (IC602)
14DVSSNGround terminal (for D-RAM interface)
15 to 17A6 to A4OAddress signal output to the D-RAM (IC602)
18XRDEID-RAM read enable signal input terminal Not used (open)
19VDD0NPower supply terminal (digital system)
20CLOKISerial data transfer clock signal input from the system controller (IC801)
21SDTOISerial data input from the system controller (IC801)
22SENSOSerial data output to the system controller (IC801)
23XLATISerial data latch pulse signal input from the system controller (IC801)
24XSOEISerial data output enable signal input from the system controller (IC801)
Analog muting on/off control signal input from the system controller (IC801)
25SYSMI
OH�: muting on
26WDCKOGRSCOR signal output to the system controller (IC801)
27SCOROSubcode sync (S0+S1) detection signal output to the system controller (IC801)
28XRSTIReset signal input from the system controller (IC801) OL�: reset
29PWMIISpindle motor external control signal input terminal (fixed at OL�)
30XQOKISubcode Q OK signal input terminal Not used (open)
31XWREID-RAM write enable signal input terminal Not used (open)
32R4MOSystem clock output to the system controller (IC801)
33VSS0NGround terminal (digital system)
34SQCKISQSO readout clock signal input terminal Not used (fixed at OH�)
35SCLKISENS serial data read clock signal input terminal Not used (fixed at OH�)
36SQSOOCD text data output terminal Not used (open)
37XEMPOD-RAM read prohibition signal output terminal Not used (open)
38XWIHOD-RAM write prohibition signal output terminal Not used (open)
39SBSOOSubcode P to W serial data output terminal Not used (open)
40EXCKOSQSO readout clock signal output terminal Not used (pull down)
Input terminal for the system clock frequency setting
41XSTLI
OL�: 16.9344 MHz, OH�: 33.8688 MHz (fixed at OL� in this set)
42HVSSNGround terminal (for headphone)
PDM signal output for L-ch headphone to the headphone amplifier (IC302)
43HPLO
Not used (open)
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