HCD-BC150/BC250
Ver 1.3
Pin No.Pin NameI/ODescription
117RFINIRF signal input from the DVD/CD RF amplifier
118, 119VCCA5, VCCA4NPower supply terminal (+3.3V) (analog system)
120VCOR1NVCO oscillating range setting resistor connected terminal
121VCOINIVCO input terminal
122, 123GNDA4, GNDA3NGround terminal (analog system)
124LPF5OSignal output from the operation amplifier from PLL loop filter
125VC1IMiddle point voltage (+1.65V) input terminal
126, 127LPF2, LPF1IInverted signal input to the operation amplifier from PLL loop filter
128, 129VCCA3, VCCA2NPower supply terminal (+3.3V) (analog system)
130PD0OSignal output from the charge pump for phase comparator
131PDHVCCIMiddle point voltage input terminal for RF PLL
132FDOOSignal output from the charge pump for frequency comparator
133, 134GNDA2, GNDA1NGround terminal (analog system)
135SPOOSpindle motor control signal output
136VC2IMiddle point voltage (+1.65V) input terminal
137MDIN2ISpindle motor servo drive signal input
138MDIN1IMDP input terminal
139VCCA1NPower supply terminal (+3.3V) (analog system)
140CLVSOControl signal output for selection the spindle control filter constant at CLVS
141VSSNGround terminal (digital system)
142MDSOUTOFrequency error output terminal of internal CLV circuit
143VDDNPower supply terminal (+3.3V) (digital system)
144MDPOUTOPhase error output terminal of internal CLV circuit
145DEFECTIDefect signal input terminal (conected to ground terminal)
146GSCORIGuard subcode sync (S0+S1) detection signal input from the digital signal processor
147EXCKOSubcode serial data reading clock signal output to the digital signal processor
148SBINISubcode serial data input from the digital signal processor
149VSSNGround terminal (digital system)
150SCORISubcode sync (S0+S1) detection signal input from the digital signal processor
151WFCKIWrite frame clock signal input from the digital signal processor
152VDD5VNPower supply terminal (+5V)
153XRCIIRAM overflow signal input terminal (conected to ground terminal)
154VDDSNPower supply terminal (+5V) (digital system)
155C2POIC2 pointer signal input from the digital signal processor
156VDDNPower supply terminal (+3.3V) (digital system)
157DBCKOBit clock signal (2.8224 MHz) output terminal Not used
158BCLKIBit clock signal (2.8224 MHz) input from the digital signal processor
159DDATOPCM data output terminal Not used
160MDATISerial data input from the digital signal processor
161VSSNGround terminal (digital system)
162DLRCOL/R sampling clock signal (44.1 kHz) output terminal Not used
163LRCKIL/R sampling clock signal (44.1 kHz) input from the digital signal processor
164XRSTIReset signal input from the mechanism controller OL�: reset
165IFS0IInterface selection signal input terminal Fixed at OL� in this set
166IFS1IInterface selection signal input terminal Fixed at OH� in this set
167XTALI33.8688 MHz clock signal input terminal
168VSSNGround terminal (digital system)
52 |
ACEC
SONY
