IC DESCRIPTION
IC, MSM64153AL
Pin No.Pin NameI/ODescriptionPin No.Pin NameI/ODescription
1SEG6OLCD segment signal output pins.4-bit input-output port (port 7): Select between input and output, between pull-down
2NCNNot used.resistor input and high impedance input, and between open-drain output and CMOS
40-42P7.3-P7.1I/O
3-8SEG5-SEG0OLCD segment signal output pins.output with the port 7 control register (P7CON). When configured for a secondary
9NCNNot used.function, an external interrupt is allocated.
Negative power supply voltage pin for internal logic. (An internally generated constant43NCNNot used.
10VSSLN
voltage is present at this pin.)4-bit input-output port (port 7): Select between input and output, between pull-down
11-13COM4-COM2OLCD common signal output pins.resistor input and high impedance input, and between open-drain output and CMOS
44P7.0I/O
output with the port 7 control register (P7CON). When configured for a secondary
14NCNNot used.
function, an external interrupt is allocated.
15COM1OLCD common signal output pins.
45VDDNDigital supply voltage. (0V)16, 17C2, C1NFor connection to capacitors that generate bias for the LCD driver.
46MD1OOutput pin of melody driver1.
________18VSS3NBias output for LCD driver. (-4.5V)
47MD1OInverted output pin of MD1 output.19VSS2NDigital negative power supply. (3.0V spec.) Bias output for LCD driver. (1.5V spec.)
48MD0OOutput pin of melody driver 0.20VSS1NDigital negative power supply. (1.5V spec.) Bias output for LCD driver. (3.0V spec.)
_________
49MD0OInverted output pin of MD0 output.
21TST3IInput pins for test.
50-52SEG35-SEG33OLCD segment signal output pins.22NCNNot used.
53NCNNot used.
23, 24TST2, TST1IInput pins for test.
54-62SEG32-SEG24OLCD segment signal output pins.
25OSC0IClock oscillation pins: Either a crystal (32.768kHz) and a capacitor (10 to 30pF) are
___________
63NCNNot used.26OSC1Oconnected to these pins or a resistor (1MW) is.
64-80SEG23-SEG7OLCD segment signal output pins.
2-bit input port (port 3): Select between pull-down resistor input and high impedance
input with the port 3 control register (P3CON). When configured for a secondary
27, 28P3.1, P3.0I
function, an external interrupt is allocated to P3.0 and an event counter is allocated to
P3.1.
4-bit input port (port 2): Select between pull-down resistor input and high impedance
input for each bit with the port 2 control register (P2CON). When configured for a
29-31P2.3-P2.1I
secondary function, an external interrupt and capture circuit trigger input are allocated.
If P2.0 to P2.3 are set to OH� level, the device enters system reset mode.
32NCNNot used.
4-bit input port (port 2): Select between pull-down resistor input and high impedance
input for each bit with the port 2 control register (P2CON). When configured for a
33P2.0I
secondary function, an external interrupt and capture circuit trigger input are allocated.
If P2.0 to P2.3 are set to OH� level, the device enters system reset mode.
34NCNNot used.
4-bit input-output port (port 6): Select between input and output, between pull-down
resistor input and high impedance input, and between open-drain output and CMOS
35-38P6.3-P6.0I/O
output with the port 6 control register (P6CON). When configured for a secondary
function, an external interrupt is allocated.
System reset input pin: Setting this pin to OH� level puts this device into a reset state.
39RESETIThen, setting this pin to OL� level starts executing an instruction from address 0000H.
This pin is internally connected to VSS1 or VSS2 through a pull-down resistor.
1516 |
ACEC
