Pin No.TerminalIn/OutFunction
15, 16XLT0, XLT1In/Out 20 MHz clock input/output
17VCCIn +5 V source
18, 19MD0, MD1In Mode selection terminal. Connected to ground.
20RSTBIn Reset signal input
21NMIIn Power ON signal input
22INTN Not used. Connected to ground.
FI0 ~ FI3
23 ~ 30In Key input signal
SI0 ~ SI3
31 ~ 38KC0 ~ KC7Out Key scan signal output
FI4 ~ FI9
39 ~ 50In Key input signal
SI4 ~ SI9
51FI10In Not used
52SI10In Not used
53 KI0In Button input signal input
54KI1N Not used
55KI2Out LED drive signal
56 ~ 58N Not used
59 ~ 76MA1 ~ MA18Out Address bus
77MCSB0Out Chip enable signal output for the sound source ROM
78, 79N Not used
80VCCIn +5 V source
81GNDIn Ground (0 V) source
82MRDBOut Read enable signal output for the sound source ROM
83 ~ 98MD0 ~ MD15In/Out Data bus
99PLEIn Sustain signal input
100P17In APO cancellation signal input
Block diagram of digital circuits
Sound Source ROM
LSI102
TC534200CF-C116
SO: Sound data
CEA0 ~ A17D0 ~ D15
BOK: Bit clock
LRCK: Word clock
MA1 ~MD0 ~
MSB0
MA18MD15
From keyboard
DAC
FI0 ~ FI9SOIC105ROUT
CPUSI
SI0 ~ SI9
BOK
CLK
LSI101
LRCKLOUT
LRCK
PGUPD912GF-3BA
UPD6379GR
X101
20 MHz
N 6 N |
ACEC
