5. IC description
5-1. ST92195
(1) General Description
1.1 INTRODUCTIONports enter high impedance mode. A reset is necessary to
The ST92195 microcnontoller is developed and manufac-exit from Halt mode.
tured by STMicroelecrtonics using a proprietary n-well 1.1.3 I/O Ports
HCMOS process. Its performance derives from the use of Up to 28 I/O lines are dedicated to digital Input/Output.
a flexible 256-register programming model for ultra-fast These lines are grouped into up to five I/O Ports and can
context switching and real-time event response. The intel-be configureed on a bit basis under software control to pro-
ligent onchip peripherals offload the ST9 core from I/O vide timing, status signals, timer and output, analog inputs,
and data management processing tasks allowing critical external interrupts and serial or parallel I/O.
application tasks to get the maximum use off core 1.1.4 TV Peripherals
resources. The ST92195 MCU supports low power con-A set of on-chip peripherals form a complete system for TV
sumption and low voltage operation for power-efficient set and VCR applications:
and low-cost embedded systems.- Voltage Synthesis
1.1.1 ST9+Core- VPS/WSS Slicer
The advanced Core consists of the Central Processing - Teletext Slicer
Unit (CPU), the Register File and the Interrupt controller.- Teletext Display RAM
The general-purpose registers can be used as accumula-- OSD
tor, Index register, or address pointers. Adjacent register 1.1.5 On Screen Display
pairs make up 16-bit registers for addressing or 16-bit The human interface is provided by the On Screen Display
processing. Although the ST9 has an 8-bit ALU, the chip module, this can produce up to 26 lines of up to 80 charac-
handles 16-bit operations, including arithmetic, loads/ters from a ROM defined 512 character set. The character
stores, and memory/register and memory/memory resolution is 10x10 dot. Four character sizes are sup-
exchanges. Two basic memory spaces are available : ported. Serial attributes allow the user to select foreground
Program Memory and the Register File, Which includes and background. Parallel attributes can be used to select
the control and status registers of the on-chip peripherals.additional foreground and background colors and underline
1.1.2 Power Saving Modeson a character by character basis.
To optimize performance versus power consumption, a 1.1.6 Teletext and Display RAM
range of operating modes can be dynamically selected.The internal 8k Teletext and Display storage RAM can be
Run Mode. This is the full speed execution mode with used to store Teletext pages as well as Display parame-
CPU and peripherals running at the maximum clock ters.
speed delivered by the phase Locked Loop(PLL) of the 1.1.7 Teletext, VPS and WSS Data Slicers
Clock Control Unit(CCU).The three on-board data slicers using a single external
Wait For Interrupt Mode. The Wait For Inter-crystal are used to extract the Teletext, VPS and WSS
rupt(WFI) instruction suspends program execution until information from the video signal. Hardware Hamming
decoding is provided.
an interrupt request is acknowledged. During WFI, the
CPU clock is halted while the peripheral and interrupt 1.1.8 Voltage Synthesis Tuning Control
controller keep running at a frequency programmable via 14-bit Voltage Synthesis using the PWM (Pulse Width
the CCU. In this mode, the power consumption of the Modulation)/BRM (Bit Rate Modulation) technique can be
used to genetate tuning voltages for TV set applications.
device can be reduced by more than 95%(LP WFI).The tuning voltage is output on one of two separate output
Wait For Interrupt Mode. The Wait For Inter-
rupt(WFI) instruction, and if the Watchdog is not enable, pins.
the CPU and its peripherals stop operation and the I/O
10 |
ACEC
