DV-502/503/DVF-3050/3550
CIRCUIT DESCRIPTION
2-2 D/A Converter : PCM1748(IC801)
Pin No.Pin NameI/ODescription
1BCKIAudio data bit clock input.
2DATAIAudio data digital input.
3LRCKIAudio data latch enable input.
4DGND-Digital ground.
5VDD-Digital power supply (+3.3V).
6VCC-Analog power supply (+5V).
7VOUTLO Analog output for L-channel.
8VOUTRO Analog output for R-channel.
9AGND-Analog ground.
10VCOM-Common voltage decoupling.
11ZERORO Zero flag output for R-channel.
12ZEROLO Zero flag output for L-channel.
13MDIMode control data input.
14MCIMode control clock input.
15MLIMode control latch input.
16SCKISystem clock input.
2-3 64 Bit SDRAM : KS641632D(IC301)
Pin No.Pin NameI/ODescription
The system clock input. all other inputs are registered to the SDRAM on
38CLKI
the rising edge of CLK.
Controls internal clock signal and when deactivated, the SDRAM will be one
37CKE-
of the states among power down, suspend or self refresh.
19CS-Enables or disables all inputs except CLK, CKE, and DQM.
Selects bank to be activated during RAS activity.
20,21BA0,BA1-
Selects bank to be read/written during CAS activity.
23~26Row address : RA0~RA11, Column address : CA0~CA7
A0~A11-
29~35Auto-precharge flag : A10
18WE,CAS,RAS-WE, CAS and RAS define the operation.
15,39LDQM,UDQMI/O Controls output buffers in read mode and masks input data in write mode.
2,4,5,7,8,
10,11,13,42
DQ0~DQ15I/O Multiplexed data input/output pin.
44 45,47,48
50,51,53
9VDD/VSS-Power supply for internal circuits and input buffers.
10VDDQ/VSSQ-Power supply for output buffers.
11NC-Unused
Block Diagram for D/A Converter
BCKSerial
LRCKInput
Vout L
DATAI/FOutput Amp and
DAC
8XLow-pass Filter
OversamplingEnhanced
Digital FilterMulti-level
MLFunctionwithDelta-SigmaVcom
FunctionModulator
MCControlController
Output Amp and
DAC
MDII/FLow-pass Filter
Vout R
System Clock
System
SCKClock\Zero DetectPower Supply
Manager
VDDVCC
DGNDAGND
ZERO L
8ZERO R |
ACEC
