Nomenclature of Keys
C#2 D#2F#2 G#2 A#2C#3 D#3F#3 G#3 A#3C#4 D#4F#4 G#4 A#4C#5 D#5F#5 G#5 A#5C#6 D#6F#6 G#6 A#6
C2 D2 E2 F2 G2 A2 B2 C3 D3 E3 F3 G3 A3 B3 C4 D4 E4 F4 G4 A4 B4 C5 D5 E5 F5 G5 A5 B5C6 D6 E6 F6 G6 A6 B6 C7
CPU (LSI1: MSM6626-01)
The CPU reads sound data from the ROM in accordance with the pressed key and the selected tone; the
CPU can read rhythm data simultaneously when a rhythm pattern is selected. Then it provides the left
and the right channels' waveforms separately, by converting the data into the waveforms with two built-in
DACs. The CPU also controls keys, switches, and LEDs.
The following table shows the pin functions of LSI1.
Pin No.TerminalIn/OutFunction
1 ~ 10 Using time sharing, the terminals provide key and switch
KO0 ~ KO16Out
74 ~ 80 scan signals, and LED drive signals.
11KO17Out Clock output for the LED driver
12KO18 (APO)Out APO (Auto Power Off) signal output.
13KO20Out Not used.
14 ~ 21KI0 ~ KI7In Input terminals from the keys and switches
22-MIIn Power ON trigger pulse input.
23-RESETIn CPU reset signal input.
24REFHIn Low level reference voltage input for the built-in DAC
25AVDDIn +5 V source for the built-in DAC
26ROUTOut Right channel sound signal output
27LOUTOut Left channel sound signal output
28AGNDIn Ground (0 V) source for the built-in DAC
29REFLIn High level reference voltage for the built-in DAC
30, 31TEST1, TEST2 Not used. Connected to ground.
32GNDIn Ground (0 V) source
33, 34COSI, COSOIn/Out 43.45 MHz clock input/output
+5 V DC source. Regardless of the power switch position,
35VDDIn
the terminal always receives +5 V DC.
36-CEOut Chip enable signal output. Low effective.
37-OEOut Read enable signal output. Low effective.
38 ~ 40ADR17 ~ ADR19Out Not used.
41 ~ 57ADR0 ~ ADR16Out Address bus for the ROM
58 ~ 73DIN0 ~ DIN15In Data bus for the ROM
N 4 N |
ACEC
