IC BLOCK DIAGRAM & DESCRIPTION
IC861 PCM1602Y (Digital to Analog Converter)
PIN ASSIGNMENTS
PINNAMEI/ODESCRIPTION
1ZERO1/GPO1OZero Data Flag fOUTor 1.V Can also be used as GPO pin.
2ZERO2/PGO2OZero Data Flag fOUTor 2.V Can also be used as GPO pin.
3ZERO3/PGO3OZero Data Flag fOUTor 3.V Can also be used as GPO pin.
4ZERO4/PGO4OZero Data Flag fOUTor 4.V Can also be used as GPO pin.
5ZERO5/PGO5OZero Data Flag fOUTor 5.V Can also be used as PGO pin.
6ZERO6/PGO6OZero Data Flag fOUTor 6.V Can also be used as PGO pin.
7NC-No Connection
8NC-No Connection
9VOUT 6OVoltage Output of Audio Signal Corresponding to Rch on DATA3. Up to 96kHz.
10VOUT 5OVoltage Output of Audio Signal Corresponding to Lch on DATA3. Up to 96kHz.
11VOUT 4OVoltage Output of Audio Signal Corresponding to Rch on DAYA2. Up to 96kHz.
12VOUT 3OVoltage Output of Audio Signal Corresponding to Lch on DATA2. Up to 96kHz.
13VOUT 2OVoltage Output of Audio Signal Corresponding to Rch on DATA1. Up to 192kHz.
14VOUT 1OVoltage Output of Audio Signal Corresponding to Lch on DATA1. Up to 192kHz.
15VCOMOCommon Voltage Output. This pin should be bypassed with a 10 F capacitor to AGND.
16NCONo Connection
17AGND5-Analog Ground
18VCC5-Analog Power Supply, +5V
19AGND6-Analog Ground
20NC-No Connection
21AGND4-Analog Ground
22VCC4-Analog Power Supply, +5V
23AGND3-Analog Ground
24VCC3-Analog Power Supply, +5V
25AGND2-Analog Ground
26VCC2-Analog Power Supply, +5V
27AGND1-Analog Ground
28VCC1-Analog Power Supply, +5V
29NC-No Connection
30NC-No Connection
31NC-No Connection
32NC-No Connection
33MDOOSerial Data Output for Serial Control P(3)ort
34MDIISerial Data Input for Serial Control P(1)ort
35MCIShift Clock for Serial Control P(1)ort
36MLILatch Enable for Serial Control P(1)ort
37RSTISystem Reset, Active LO(1)W
(2)
38SCKIISystem Clock Inout. Input frequency is 128,192,256,384,512, or 768fs.
39SCKOOBuffered Clock Output. Output frequency is 128,192,256,384,512, or 768fs, or one-half of 128,192,256,384,512, or 768fs.
40BCKIShift Clock Input for Serial Audio Data. Clock must be 32,48, or 64fs.(2)
41LRCKILeft and Right Clock Input. This clock is equal to the sampling rs.(2)ate, f
42TEST-Test Pin. This pin should be connected to DGND(1).
43VDD-Digital Power Supply, +3.3V
44DGND-Digital Ground
45DATA1ISerial Audio Data Input fOUT 1 and or VOUTV 2(2)
46DATA2ISerial Audio Data Input fOUT 3 and or VOUTV 4(2)
47DATA3ISerial Audio Data Input fOUT 5 and or VOUTV 6(2)
48ZEROAOZero Data Flag. Logical "AND" of ZERO1 through ZERO6.
NOTES: (1) Schmitt-Trigger input with internal pull-down, 5V tolerant. (2) Schmitt-Trigger inout, 5V tolertput.ant. (3) Tri-state ou
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ACEC
