D-NE319/NE320/NE321/NE321CK/NE326CK
Ver. 1.5
SECTION 4
DIAGRAMS
? Note for Printed Wiring Boards and Schematic Diagrams
Note on Printed Wiring Board:Note on Schematic Diagram:
? X : parts extracted from the component side.? All capacitors are in ?F unless otherwise noted. (p: pF)
? Y : parts extracted from the conductor side.50 WV or less are not indicated except for electrolytics
?z: Through hole.and tantalums.
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?f: internal component.? All resistors are in & and /4 W or less unless otherwise
?: Pattern from the side which enables seeing.specified.
(The other layers' patterns are not indicated.)?f: internal component.
? C : panel designation.
Caution:
Pattern face side: Pathe patterrts on n face side seen fromNote:Note:
(Conductor Side)the pattern face are indicated.The components identi-Les composants identifiŽs par
Parts face side:Parts on the parts face side seen fromfied by mar0k or dottedune marque 0 sont critiques
(Component Side) the parts face are indicated.line with mar0 are crk iti-pour la sŽcuritŽ.
cal for safety.Ne les remplacer que par une
Caution:Replace only with parpiŹce porttant le numŽro
Pattern face side: Pathe patterrts on n face side seen fromnumber specified.spŽcifiŽ.
(Side B)the pattern face are indicated.
? A : B+ Line.
Parts face side:Parts on the parts face side seen from
? Power voltage is dc 1.5 V and fed with regulated dc power
(Side A)the parts face are indicated.
supply from battery teminal.
? EGL board is multi-layer printed board.? Voltages and waveforms are dc with respect to ground
However, the patterns of intermediate-layer have not been in-under no-signal conditions.
cluded in diagram.no mark : CD PLAY
? Voltages are taken with a VOM (Input impedance 10 M&).
Voltage variations may be noted due to normal produc-
? Lead Layouts
surfacetion tolerances.
? Wa veforms are taken with a oscilloscope.
Voltage variations may be noted due to normal produc-
tion tolerances.
? Circled numbers refer to waveforms.
? Signal path.
J: CD PLAY
Y The voltage and waveform of CSP (chip size package)
cannot be measured, because its lead layout is different
Lead layout of conventional ICCSP (chip size package)
form that of conventional IC.
? Abbreviation
AU S: Australian model
E18 : South African, Singapore, Malaysia, Vietnam and
Indian model (NE320/NE326CK)
E18/1 : South African, Singapore, Malaysia, Vietnam and
Indian model (NE321)
EA: Saudi Arabia model
HK: Hong Kong model
JE: Tourist model
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ACEC
