? Two different representations of input chrominance data
- 2?s complement code
- Positive dual code
? Flexible inpu t sync controller
? Flexible compression of the input signal
- Digital vertical compression of the input signal (1.0, 1.25, 1.5, 1.75, 2.0, 3.0, 4.0)
- Digital horizontal compression of the input signal (1.0, 2.0, 4.0)
? Noise reduction
- Motion adaptive s patial and temporal noise reduction (3D -NR)
- Temporal noise reduction for luminance frame based or field based
- Temporal noise reduction for chrominance field based
- Separate motion detectors for luminance and chrominance
- Flexible programming of the t emporal noise reduction parameters
- Automatic measurement of the noise level (5 -bit value, readable by I2C bus)
? 3-D motion detection
- High performance motion detector for scan rate conversion
- Global motion detection flag (readable by I2C bus)
- Movie mode and phase detector (readable by I2C bus)
? TV mode detection by counting line numbers (PAL, NTSC, readable by I2C bus)
? Embedded memory
- 5 Mbit embedded DRAM core for field memories
- 192 kbit embedded DRAM core for line memories
? Flexible clock a nd synchronization concept
- Decoupling of the input and output clock system possible
? Scan rate conversion
- Motion adaptive 100/120 Hz interlaced scan conversion
- Motion adaptive 50/60 Hz progressive scan conversion
- Simple static interlaced and progr essive conversion modes for 100/120 Hz interlaced or 50/60 Hz
progressive scan conversion: e.g. ABAB, AABB, AA*B*B, AAAA, BBBB, AB, AA*
- Simple progressive scan conversion with joint lines:
50 Hz -> 60, 70, 75 Hz progressive
60 Hz -> 70, 75 Hz progressive
- Large area and line flicker reduction
? Flexible digital vertical expansion of the output signal (1.0, ... [1/32] ..., 2.0)
? Flexible output sync controller
- Flexible positioning of the output signal
- Flexible programming of the output sync raster
- External synchronization by backend IC possible
(e.g. split screen for one TV channel with joint lines and one PC VGA channel)
? Signal manipulations
- Insertion of coloured background
- Vertical and/or horizontal windowing with four different speed factor s
- Flash generation (for supervising applications, motion flag readable by I2C bus)
- Still frame or field
- Support of split screen applications
- Multiple picture display - Tuner scan (4 and 16 times for 4:3, 12 times for 16:9 tubes)
- Support of multi picture display with PIP or front -end processor with integrated scaler
(e.g. 9 times display of PIP pictures, picture tracking, random pictures, still -in-moving picture, moving -
in-still picture)
? I2C-bus control (400 kHz)
? P-MQFP-64 package
? 3.3 V ? 5% supply voltage
14.6.3.Pin Definition
Pin No. Name Type Description
2,8,24,42,55 VSS1 S Supply voltage ( V SS = 0 V )
9,25,41,56 VDD1 S Supply voltage ( V DD = 3.3 V )
36,52,58 VSS2 S Supply voltage ( V SS = 0 V )
35,51,53,57,59 VDD2 S Supply voltage ( V DD = 3.3 V )
43,..,50 YIN0...7 I/TTL Data input Y (see input data format)
31,..,34;37,...,40 UVIN0...7 I/TTL Data input UV (for 4:2:2 parallel, see input data format)
11 |
ACEC
