Pin 2 Spdif1
Pin 8 Spdif2
Pin 21 Sub-woofer
Pin 30 Surround Left
Pin 31 Surround Right
Pin 32 centre
The Scart I/O and Reset etc. are exactly the same as described in the previous section, except the signals
are routed to the respective pins of the MSP4450.
A single 18.432 MHz Crystal is used to generate all the clocks on the board. It starts on pins 71 and 72 of
I3 before being buffered and outputted on pin 74. Here it passes through a coupling capacitor and EMI filter
before reaching pin 71 of I2. Here the signal is buffered again and appears at pin 74, where it passes via
an EMI filter and coupling capacitor before being applied to pin 9 of I1.
In Stereo mode the majority of the chipset is redundant, and all the signal processing takes place within the
MSP4450.
In Dolby Pro-logic mode the signal is first passed from the MSP in I2S format on pins 4, 5, and 6 to the
MAS3528E (pins 19 to 21). This is then passed straight through to the DPL4519G where, if selected, Dolby
Pro logic decoding takes place. This device then carries out D to A
Conversion on the Centre channel, which emerges on pin 25 of the device, and also on the mono surround
channel which then appears on both pins27 and 28 of the device.
The left and right channels are passed in I2S format via pin 6 to pin 22 of the MSP. The MSP then carries
out D to A conversion and they appear at pins 27 and 28
In Dolby Digital 5.1 Mode the Digital bitstream is sourced via the main boards SPDIF input situated on
Phono2 called ?Digital in?. This is carried via a shielded lead to the plug P400 adjacent to the MSP socket
on the main board. It is then carried to the sub board via pin 2 of the MSP position where it finally reaches
pin 38 of the MAS3528E. The MAS then carries out Dolby decoding. The decoded channels then appear
as an I2S signal on pins 25 to 27 (Clock, Word strobe and data respectfully) before reaching pins 19,20
and 22 of the DPL4519G. This then outputs the surround and centre channels as described before but for
the exception of the surround channels carrying ?independent? information (as opposed to being mono with
Pro Logic)
The subwoofer channel appears at pin 24.
The left and Right channels are then passed to the MSP for D to A conversion as before.
In the case of Dolby Digital models both Op Amps are fitted, as well as all 6 emitter followers
Both sockets Phono1 and Phono2 are also fitted.
AUDIO AMPLIFIERS
The audio amplifier used on this chassis is a stereo class D unit; it requires both positive and negative
power supply rails. The outputs from pins 3 & 23 are square waves with a frequency of approximately
200kHz which are pulse width modulated, these are then filtered by LA04 /CA16 and LA02/CA03. The
switching fundamental frequency is not completely removed by the filters but is comparatively small and of
a high enough frequency not to be heard.
PIN FUNCTION PIN FUNCTION
1 Negative signal/substrate supply 14 Current setting resistor
2 Negative power supply left 15 Triangular waveform right
3 PWM output left 16 Internal -5V decoupling
4 Positive power supply left 17 Feedback right pin 1
5 Bootstrap left 18 Right signal input
6 Mute/stand by 19 Feedback right pin 2
7 Feedback left pin 1 20 Not connected
8 Oscillator setting pin 21 Bootstrap right
9 Feedback left pin 2 22 Positive power supply right
10 Left signal input 23 PWM output right
11 Triangular waveform left 24 Negative power supply right
12 Internal +5V decoupling 25 Internal 10V regulator
13 Signal ground
Pin 6 the stand by / Mute line is controlled by the micro-processor I003 via QA01 during power up and
power down. When a plug is inserted into the headphone socket HS01 the 17V looped through the
headphone socket (pin 9 in, pin 8 out) is removed from pin 8 causing pin 26 of I003 to fall. When I003 sees
2
this low on pin 26 it commands I401 (MSP3410 audio processor) via the IC to output a high level from pin
4 which is then applied to the base of QA01 via RA01 and DA03.
The same control path is used when the software option to mute the internal speakers is selected. |
ACEC
HITACHI
