DIGITAL SIGNAL PROCESSOR, LSI-S (HG51A115A01FD)
The LSI-S is a 16-bit DSP(Digital Signal Processor) and accessable to 16M-bit sound source ROM and to 64K-
bit RAM. The DSP can read data of 32 polyphonic note from the ROM and provides two 16-bit serial dat with
timing signals to each channel's D/A converter.
Pin No.TerminalIn/OutFunction
1~7D7~D0I/OData bus.
11GND7InGround(0V) source.
12CK16Out16.384MHz clock pulse output.
13VCC6In+5V source
14CK0InClock pulse input. Connected to terinal CK16.
16VCC1In+5V source.
17GND1InGround(0V) source.
18,19XTI, XTOIn/Out16.384MHz clock pulse input/output. Connected to crystal.
21CCSBIChip select signal input.
22~25CA0~CA3InAddress bus.
26CE0InConnected to ground.(ROM interface ontrol terminal)
27CWRBInWrite enable signal.
28CRDBInRead enebla signal.
33RESBInReset sna iput
34TESBInConnected to +5V.
40~49
RD0~RD15InData bus for sound source ROM.
52~57
50VCC2In+5V source.
51GND2InGround(0V) source.
59RA22OutChip enable signal output for ROM.
62~73
RA0~RA19OutAddress bus for sound source ROM.
75~82
74GND5InGround(0V) source.
84VCC3In +5V source.
85GND3InGround source.
86WOK1OutWard clock for DAC.
88SOLPOut16-bit serial data for L-channel DAC.
89BOKOutBit clock for DAC.
93VCC5In+5V source.
95,97
99~105
EA0~EA12OutAddress bus for RAM.
107,109
110,112
96EWEBOutWrite enable signal for RAM.
106EOEBOutRead enable signal for RAM.
108VCC7In+5V source.
111ECEBOutChip eneble signal for RAM.
118VCC4In+5V source.
119GND4InGround(0V) source.
123~130ED0~ED7In/OutData bus for RAM.
131GND6InConnected to Ground.
132SSIInConnected to Ground.
133SBCKInConnected to Ground.
134SWCKInConnected to Ground.
N 4 N |