Circuit Descriptions and Abbreviation ListEM5E9.EN 115
9.8Video: High-end Output Processor (HOP) and cut-off voltage at a current of 8 ?A. With this measurement, the
black level at the RGB-outputs is adjusted. Therefore, at start-
TOPIC (diagram B4)
up there is no monitor pulse anymore. At start-up, the HOP
measures the pulses, which come back via pin 44. The RGB-
9.8.1 General
outputs have to be between 1.5 V and 3.5 V. If one of the
outputs is higher than 3.5 V or one of them lower then 1.5 V,
The YUV-signals from the PICNIC are fed to the HOP (High-the RGB-outputs will be blanked.
end Output Processor, TDA9330). The video and geometry
control parts are integrated in the HOP. Also the RGB-signals
9.8.6 Geometry control
for TXT/OSD (from the P) are inserted via the HOP. The
geometry part delivers the H-drive, EW-drive, V-drive, and also
2
All geometry control is done via IC and the data is stored in the
a drive signal for rotation.
NVM (IC7011) of the SSB.
The main functions of the HOP are:
Video control (contrast, brightness, saturation, etc.).9.8.7 Deflection Control
Deflection drive.
Second RGB interface for OSD/TXT.Line Drive
Peak White Limiting.The Line drive is derived from an internal VCO of 13.75 MHz.
Cut-off control and White Drive (RGB outputs).As a reference, an external resonator is used (1301). The
Geometry control.internal VCO is locked with the HD100-pulse, which comes from
the PICNIC.
The TOPIC (The most Outstanding Picture improvement IC, The 'PHI-2' part in the HOP receives the HFB_X-RAY_PROT
item 7302, type TDA9178) is an optional IC between the (pin 13) to correct the phase of the Line drive. The EHT-info is
PICNIC and the HOP. It has the following (picture supplied to pin 14 (DYN-PHASE-CORR) to compensate
improvement) functions:picture breathing depending on the beam current.
Luminance Transient Processor (LTP), for detail
enhancement. Frame Drive
Chrominance delay circuitry, to compensate timing At pins 1 and 2, the symmetrical frame drive signals are
differences between Y and C. available. The VSYNC signal, for synchronisation of the OSD/
Spectral processor, for improved sharpness and colour TXT, is derived from the 'FRAMEDRIVE-' signal.
transient improvement (CTI).
Colour vector processor, for skin tone correction, green
East/West Drive
enhancement and blue stretch.
At pin 3, the E/W drive signal is available. Pin 4 is a feedback
Measure and detection circuitry, for AutoTV.
input for the EHT-info, and is used to prevent pumping of the
picture. The EHT varies also dependent on the beam current.
The sandcastle pulse from the HOP is fed to pin 1 of the
E.g. for wide-screen without load this is 31.5 kV and with load
TOPIC, which is used as reference for timing.
(1.5 mA) 29.5 kV.
9.8.2 Video Control
Frame Rotation
For frame rotation, a control voltage is used from pin 25 of the
After source selection, the HOP controls the signals for HOP. Frame rotation is only used in wide-screen sets.
Saturation, Contrast, and Brightness. Output is RGB again.
9.8.8 Protections
9.8.3 OSD/TXT Control
Flash detection
On pins 35 to 38, the RGB and fast blanking from the OTC When a flash occurs, the EHT-info will become negative very
(OSD and TXT) are inserted. The sync signal VSYNC is derived fast. Via R3316, D6304, and D6303, TS7303 starts to conduct.
from the 'FRAMEDRIVE-" signal.This makes pin 5 of HOP 'high'. The output (pin 8) is
immediately stopped.
9.8.4 Peak White LimitingIf the H-drive stops, then also pin 5 will become 'low' again,
which will reset the flash detection.
On pin 43 there is a Peak White Limiting signal line (PWL). If A bit (FLS) is set in an output status register, so that the OTC
the beam current increases, the 'EHT-info' voltage will can see that there was a flash. This FLS-bit will be reset when
decrease. Average limiting via R3343/C2333 controls PWL.the OTC has read that register.
9.8.5 Cut-off ControlHFB protection
If the HFB is not present, this is detected via the HOP. The OTC
puts the set into protection and reads a register in the HOP. An
The following will happen when you switch the TV to Standby:
error code is generated.
1. The vertical scan is completed.
2. The vertical flyback is completed (the horizontal output is
gated with the flyback pulse, so that the horizontal output 9.9Synchronisation (Diagram B2, B3 & B4)
transistor cannot be switched 'on' during the flyback pulse).
3. The 'slow stop' of the horizontal output is started, by
The HIP video processor provides the vertical and horizontal
gradually reducing the 'on' time at the horizontal output
sync pulses VA50 and HA50. They are synchronised with the
from nominal to zero (this will take 50 ms).
incoming CVBS signal. Then these pulses are fed to the
4. At the same time, the fixed beam current is forced via the
PICNIC, where they are doubled to be synchronous with the
black-current-loop for 25 ms. This is done by setting the
100 Hz picture. The outgoing pulses, VD100 and HD100, are fed
RGB outputs to a maximum voltage of 5.6 V.
to the HOP, which supplies the vertical and horizontal drive
pulses and the 100 Hz (2fH) sandcastle pulse.
In the EM5E a 'one-point' cut-off control is used:
A current of 8 ?A (for cut-off) is fed to pin 44 of the HOP. This
The VD100 pulse from the PICNIC is inverted by TS7304 to the
is done with a measurement pulse during the frame flyback.
VD signal. The OTC is synchronised on the HFB pulse from the
During the first frame, three pulses are generated to adjust the |
ACEC
PHILIPS
