2) Transmitter SystemThe audio signal is converted to an electric signal in either the internal or
1. Modulator Circuitexternal microphone, and input to the microphone amplifier (IC6). IC6
consists of two operational amplifiers; one amplifier (pins 1, 2, and 3) is
composed of pre-emphasis and IDC circuits and the other (pins 5, 6, and 7)
is composed of a splatter filter. The maximum frequency deviation is
determined to its optimal value by switch circuits consisting of Q9 and Q10
and input to the cathode of the varicap of the VCO, to change the electric
capacity in the oscillation circuit. This produces the frequency modulation.
2. Power AmplifierThe transmitted signal is oscillated by the VCO, amplified by the pre-drive
Circuitamplifier (Q102) and drive amplifier (Q101), and input to the power module
(IC101). The signal is then amplified by the power module (IC101) and led
to the antenna switch (D101) and low-pass filter (L102, L103, L104, C113,
C107, C116, and C114), where unwanted high harmonic waves are
reduced as needed, and the resulting signal is supplied to the antenna.
3. APC CircuitPart of the transmission power from the low-pass filter is detected by D103,
converted to DC, and then amplified by a differential amplifier. The output
voltage controls the bias voltage from pin 2 of the power module (IC101) to
maintain the transmission power constant.
3) PLL Synthesizer Circuit The dividing ratio is obtained by sending data from the CPU (IC5) to pin 2
1.PLLand sending clock pulses to pin 3 of the PLL IC (IC102). The oscillated
signal from the VCO is amplified by the buffer (Q117) and input to pin 6 of
IC102. Each programmable divider in IC102 divides the frequency of the
input signal by N according to the frequency data, to generate a
comparison frequency of 5 or 6.25 kHz.
2. Reference FrequencyThe reference frequency appropriate for the channel steps is obtained by
Circuitdividing the 21.25 MHz reference oscillation (X101) by 4250 or 3400,
according to the data from the CPU (IC5). When the resulting frequency is
5 kHz, channel stepsof5, 10, 15, 20, 25 and 30 kHz are used. When it is
6.25 kHz, the 12.5 kHz channel step is used.
3. Phase ComparatorThe PLL (IC102) uses the reference frequency, 5 or 6.25 kHz. The phase
Circuitcomparator in the IC102 compares the phase of the frequency from the
VCO with that of the comparison frequency, 5 or 6.25 kHz, which is
obtained by the internal divider in IC102
4. PLL Loop Fitter Circuit If a phase difference is found in the phase comparison between the
reference frequency and VCO output frequency, the charge pump output
(pin 8) of IC102 generates a pulse signal, which is converted to DC voltage
by the PLL loop filter and input to the varicap of the VCO unit for oscillation
frequency control.
Page-4 |
ACEC
