DPF-K6010V(K) COVER1,1( 98.12.10 10:54 y[W 11
DPF-K6010V
CIRCUIT DESCRIPTION
2. VIDEO DAC : IC12 (ES3209F)
Pin description
No.NameI/ODescription
1, 2VSS�Ground.
3NC�No used.
4, 5VCC�Voltage supply, 5V.
6DISC CIClock for programming to access internal registers.
7AUX0 (CLOCK)O Outputs serial data transfer clock to IC2 (D.S.P).
8DSC D0I/O Data for programming to access internal registers.
9AUX1 (FOK)O Focus OK output. Used for SENS output and servo auto sequencer.
10DISC SIStrobe for programming to access internal registers.
11AUX2 (RMR)O Loading motor forward direction output.
O Dual-purpose pin. DCLK is the MPEG decoder clock.
12DCLK/EXT CLK
IEXT CLK is the external clock. EXT CLK input during bypass PLL mode.
13RSTIVideo reset (active low).
14AUX7 (RML)O Loading motor reverse direction output.
15MUTEO No used.
16VCC�Voltage supply, 5V.
17MCLK�No used.
18AUX8 (LMR)O Load motor opposite direction (taking out) output.
19TWS/SPLL OUT�No used.
20AUX9 (LMF)O Load motor positive direction (dragging) output.
21, 22TSD/TBCK�No used.
O Dual purpose pin. RWS is the receive audio frame sync.
Pins SEL PLL [1 : 0] select the PLL clock frequency for DCLK output.
SEL PLL1SEL PLL0DCLK
23RWS/SEL PLL1I00Bypass PLL (Input Mode)
0127MHz (Output Mode)
1032.4MHz (Output Mode)
1140.5MHz (Output Mode)
24RST OUTO Reset output (active low).
25~31VSS�Ground.
32VCC�Voltage supply, 5V.
O Dual purpose pin. RSD is the receive audio data input.
33RSD/SEL PLL0
ISEL PLL0 is the select PLL. See the table for pin no. 23.
34AUX10 (LDON)O Laser ON/OFF control.
35AUX11 (BRKM)O Rotary motor deceleration output.
36AUX12 (A18)O Address output to IC14 (4M DRAM).
O Dual purpose pin. RBCK is the receive audio bit clock.
37RBCK/SER INSER IN is serial input DSC mode.
I0 = Parallel DSC mode.
1 = Serial DSC mode.
38AUX13 (166L)O IC17 (TC74HC166AF), Shift/Load.
39AUX14 (166CK)O IC17 (TC74HC166AF), clock.
40AUX15 (R MUTE)O Digital mute control terminal.
41VSSA�Analog ground.
42VREF MI DAC and ADC minimum reference. Bypass to VCMR with 10uF in parallel with 0.1uF.
43VREF PI DAC and ADC minimum reference. Bypass to VCMR with 10uF in parallel with 0.1uF.
44, 45VCCA�Analog VCC, 5V.
46, 47AOR/AOL�No used.
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