DV-5700/DVF-R9050/R9050-S
CIRCUIT DESCRIPTION
6-2 Block Diagram
ODC, TS Stream
PLL27MHz
Decoder etc.InterfaceVideo
and
Audio
Decoder
Stream
Parser
Sub- pictureREC656
Decoder(Digital Video Out)
System ControllerHostVideo
(Microprocessor)InterfaceInterfaceDACY/Y
NTSC/PALDACCb/Composite
MemoryEncoderDACCr
SDRAMInterfaceAudioDACC/C
(16bit)InterfaceAudio Out
(DAC for Audio)
CD-DA
IEC958
7. Digital Video Enhancer : FL12220 (X35, IC703)
7-1 Port Function
Port No.Port NameI/OFunction
External OSD Interface
1~5OSDC(0~4)Multiplexed chroma signal is input on this bus.
156~160OSDC(5~9)I(Connected to ground.)
6OSDSEL-External OSD select input. (Connected to ground.)
144~153OSDY(0~9)-External OSD luma input. (Connected to ground.)
Test outputs(Not shown on Block diagram)
7~10TEST(03~06)
OTest outputs. These pins should be left unconnected for normal operation.
13~15TEST(00~02)
Test inputs(Not shown on Block diagram)
19TESTB I Active low test input. This pin should be tied to VDD for normal operation.
69,70,14TEST (0~2)I Active high test inputs. This pin should all be tied to VSS for normal operation.
Power Supply Connections(Not shown on Block diagram)
11,28,40,49,59
60,81,87,93,99
Digital power connections. Connect to the digital +3.3 volt power supply
101,107, 113,119VDD-
and decouple to the digital ground plane.
121,127,131,135
141,154
12,29,41,50,79
80,82,88,94,100
102,108,114,120VSS-Digital ground connections. Connect to the digital ground plane.
122, 128,132,136
142,155
Analog current sink return for the video DAC circuits.
72ISINK-
Connect to the analog ground plane.
68AVDD-Analog power connections for the clock PLL circuits.
74AVDD-Analog power connections for the video DAC circuits.
Control Signals
16SDAI I2C compatible serial control bus data.
2
17SCLI/O IC compatible serial control bus clock.
2
18,20MODE(0,1)-IC operating MODE(0,1).
The setting of ADDR(0~2) allow the I2C address of the device to be programmed
21~23ADDR(0~2)-
to prevent conflict with the other I2C devices in the system.
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ACEC
