PIN DESCRIPTION (continued)
PIN NO SYMBOL IODESCRIPTION
70LOCKO Output signal of LKFS condition sampled PBFR/16 (if LKFS is ?H?, LOCK is ?H?, if
LKFS is sampled ?L? at least 8 times by PBFR/16, LOCK is ?L?.)
71PBFRO Write frame clock (Lock: 7.35KHz)
72SMEFO LPF time constant control of the spindle servo error signal
73SMONO ON/OFF control signal for spindle servo
74DVDD2-Digital VDD2
75SMDPO Spindle Motor drive (Rough control in the SPEED mode, Phase control in the PHASE
mode)
76SMSDO Spindle Motor drive (Velocity control in the PHASE mode)
77BCKIIAudio data bit clock input of 48 bit/Slot (2.1168MHz)
78TESTVITEST input terminal (GND connection)
79DSPEEDITEST input terminal (VDD connection)
80LRCHIIChannel clock input of 48 bit/Slot (44.1KHz)
BLOCK DIAGRAM
S0S1SBCKSDAT
263233
SUBCODESUBCODESUBCODE-Q30SQDT
SYNCOUTPUTREGISTER
29SQCK
DETECTOR
EFM23BITEFM
EFMI66PHASESHIFTDEMODULATOR
DETECTORREGISTER
8BIT DATA BUS
CNTVOL5
DIGITALADDRESS
DPFIN3PLLGENERATOR
FRAME SYNC
DPFOUT4DETECTOR
PROTECTOR
DPDO2INSERTOR
16K
SMEF72SRAM
DIGITAL
SMON73
CLV
SMDP75
SERVOSMSD76
LOCK70ECC
X-TAL
XOUT9TIMING
XIN8GENERATORINTERPOLATOR
11LRCHO
12ADATAO
14
MDAT37BCKO
MCK38CPUTRACK
MLT36INTERFACECOUNTERDIGITAL77BCKI
67ADATAI
FILTER
TRCNT69& DE-EMPH60LRCHI
/ISTAT6824EMPH
MODEDIGITALD/A17VREFL1
SELECTOROUTPUTCONVERTER22VREFH1
6162636571920
XTALSELTEST0CDROMTEST1DATXRCHOUTLCHOUT
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ACEC
