Circuit DescriptionL01.1E AB9.EN 71
In Standby, the power supply works in ?burst mode?.t2
t1t3
Burst mode can be used to reduce the power consumption
Active/
below 1 W at stand-by. During this mode, the controller is active inactive
(generating gate pulses) for only a short time and for a longer
time inactive waiting for the next burst cycle.IL
Soft start
In the active period the energy is transferred to the secondary
and stored in the buffer capacitor CSTAB in front of the linear
VSTAB
stabiliser (see Figure below). During the inactive period, the
V?C
load (e.g. microprocessor) discharges this capacitor. In this
mode, the controller makes use of the Safe-Restart mode.V(start)
CCV
V(UVLO)
VIN
Burst mode waveformsCL 16532020_082.eps
100401
VCCVSTAB V?C
1Vcc Drain8Linear
2GndHVS 7stabilizer
Figure 9-15
CVcc3CtrlDriver6CSTAB
4DemagSense5
9.6.3 Protection Events
The SMPS IC7520 has the following protection features:
R1Burst-Mode stand-by on/off
from microprocessor
Current pulseDemagnetisation sense
generator
This feature guarantees discontinuous conduction mode
operation in every situation. The oscillator will not start a new
Basic Burst mode configurationCL 16532020_081.epsprimary stroke until the secondary stroke has ended. This is to
100401
ensure that FET 7521 will not turn on until the demagnetisation
of transformer 5520 is completed. The function is an additional
Figure 9-14
protection feature against:
saturation of the transformer,
The system enters burst mode standby when the damage of the components during initial start-up,
microprocessor activates the ?Stdby_con? line. When this line is
an overload of the output.
pulled high, the base of TS7541 is allowed to go high. This is
The demag(netisation) sense is realised by an internal circuit
triggered by the current from collector TS7542. When TS7541
that guards the voltage (Vdemag) at pin 4 that is connected to
turns ?on?, the opto-coupler (7515) is activated, sending a large VCC winding by resistor R1 (R3522). The Figure below shows
current signal to pin 3 (Ctrl). In response to this signal, the IC the circuit and the idealised waveforms across this winding.
stops switching and enters a ?hiccup? mode. This burst
activation signal should be present for longer than the ?burst
1VccDrain8VGATE
blank? period (typically 30 ?s): the blanking time prevents false
2GndHVS7
burst triggering due to spikes.3CtrlDriver6Demagnetization
4DemagSense5
Burst mode standby operation continues until the
microcontroller pulls the ?Stdby_con? signal low again. The I(opp)(demag)I(ovp)(demag)VWINDINGAVOUTNVcc
R1NS
base of TS7541 is unable to go high, thus cannot turn ?on?. This 0V
will disable the burst mode. The system then enters the start-DR2VCCAVINNVcc
windingN
up sequence and begins normal switching behaviour.P
configuration
AMagnetizationVdemag
0.7V Comparatorthreshold
For a more detailed description of one burst cycle, three time Vdemag
B0V
-0.25V
intervals are defined:
t1: Discharge of VCC when gate drive is active During the
first interval, energy is transferred, which result in a ramp-
Figure 9-16
up of the output voltage (VSTAB) in front of the stabiliser.
When enough energy is stored in the capacitor, the IC will
Over Voltage Protection
be switched ?off? by a current pulse generated at the
The Over Voltage Protection ensures that the output voltage
secondary side. This pulse is transferred to the primary
will remain below an adjustable level. This works by sensing
side via the opto coupler. The controller will disable the
the auxiliary voltage via the current flowing into pin 4 (DEM)
output driver (safe restart mode) when the current pulse
during the secondary stroke. This voltage is a well-defined
reaches a threshold level of 16 mA into the Ctrl pin. A
replica of the output voltage. Any voltage spikes are averaged
resistor R1 (R3519) is placed in series with the opto
by an internal filter.
coupler, to limit the current going into the Ctrl pin.
If the output voltage exceeds the OVP trip level, the OVP circuit
Meanwhile the VCC capacitor is discharged but has to stay
switches the power MOSFET ?off?.
above VUVLO .
Next, the controller waits until the ?under voltage lock out? level
t2: Discharge of VCC when gate drive is inactive During the
(UVLO = ? 9 V) is reached on pin 1 (V). This is followed by a
second interval, the VCC is discharged to VUVLO. The output CC
safe restart cycle, after which switching starts again. This
voltage will decrease depending on the load.
process is repeated as long as the OVP condition exists. The
t3: Charge of VCC when gate drive is inactive The third
output voltage, at which the OVP function trips, is set by the
interval starts when the UVLO is reached. The internal
demagnetisation resistor R3522.
current source charges the VCC capacitor (also the soft
start capacitor is recharged). Once the VCC capacitor is
charged to the start-up voltage, the driver is activated and Over Current Protection
a new burst cycle is started.The internal OCP protection circuit limits the ?sense? voltage on
pin 5 to an internal level. |
ACEC
