8224 N/B Maintenance8224 N/B Maintenance
5.2 Intel ICH7-M South Bridge (11)
Miscellaneous Signals
Name Type Description
INTVRMEN I Internal Voltage Regulator Enable:
This signal enables the internal 1.05 V Suspend regulator when
connected to VccRTC. When connected to Vss, the internal regulator
is disabled.
SPKR O Speaker:
The SPKR signal is the output of counter 2 and is internally
?ANDed? with Port 61h bit 1 to provide Speaker Data Enable. This
signal drives an external speaker driver device, which in turn drives
the system speaker. Upon PLTRST#, its output state is 0.
NOTE: SPKR is sampled at the rising edge of PWROK as a
functional strap. See Function Straps for more details. There is a weak
integrated pull-down resistor on SPKR pin.
RTCRST# I RTC Reset:
When asserted, this signal resets register bits in the RTC well.
NOTES:
1. Unless CMOS is being cleared (only to be done in the G3 power
state), the RTCRST# input must always be high when all other
RTC power planes are on.
2. In the case where the RTC battery is dead or missing on the
platform, the RTCRST# pin must rise before the RSMRST# pin.
TP0 I Test Point 0:
This signal must have an external pull-up to VccSus3_3.
TP1 O Test Point 1:
Route signal to a test point.
TP2 O Test Point 2:
Route signal to a test point.
TP3 I/O Test Point 3:
Route signal to a test point.
Real Time Clock Interface
Name Type Description
RTCX1 Special Crystal Input 1:
This signal is connected to the 32.768 KHz crystal. If no external
crystal is used, then RTCX1 can be driven with the desired clock rate.
RTCX2 Special Crystal Input 2:
This signal is connected to the 32.768 KHz crystal. If no external
crystal is used, then RTCX2 should be left floating.
100
Confidential Document
MiTac Secret |
ACEC
MITAC
