Pin No.TerminalIn/OutFunction
93VCC5In +5V source
94, 95
97 ~ 105
EA0 ~ EA14Out Address bus for the effect RAM
107,109
110, 112
96EWEBOut Write enable signal output for the effect RAM
106EOEBOut Read enable signal output for the effect RAM
108VCC7In +5V source
111ECEBOut Chip select signal output for the effect RAM
113 ~ 117 Not used.
118VCC4In +5V source
119GND4In Ground (0V) source
120 ~ 122 Not sued.
123 ~ 130ED0 ~ ED7In/Out Data bus for the effect RAM
131GND5In Ground (0V) source
132 ~ 134 Not used. Connected to ground.
135, 136 Not used.
Block diagram of DSP and DAC circuit
Sound Source ROM
TC5316200CP-C081
SOLP: Sound data
CEA0 ~ A19D0 ~ D15
BOK: Bit clock
WOK1: Word clock
RA0 ~RD0 ~
RA22
RA19RD15
DAC
D0 ~ D7SOLPROUT
SI
DSP
A0 ~ A3BOKCLK
HG51A115A01FD
LSIS
WOK1LOUT
RDAPOLRCK
WRAPOUPD6376CX
RESETECEB EOEB EWEB
ED0 ~ EA0 ~
CS OE WE
ED15EA14PG
D0 ~ D15 A0 ~ A14
16.384MHz
Effect RAM (256K-bit)
HM65256BLP
N 9 N |