DTR-5.5
IC BLOCK DIAGRAMS AND DESCRIPTIONS
ADV7172KSTZ(Digital PAL/NTSC Vidoe Encoder with Six DACs)
PIN FUNCTION DESCRIPTION
MnemonicInput/OutputFunction
P7-P0I8-Bit 4:2:2 Multiplexed YCrCb Pixel Port (P7�P0) P0 represents the LSB.
CLOCKITTL Clock Input. Requires a stable 27 MHz reference clock for standard operation. Alter-
natively, a 24.5454 MHz (NTSC) or 29.5 MHz (PAL) can be used for square pixel operation.
HSYNCI/OHSYNC (Modes 1 and 2) Control Signal. This pin may be configured to output (Master
Mode) or as an input and accept (Slave Mode) Sync signals.
FIELD/VSYNCI/ODual Function FIELD (Mode 1) and VSYNC (Mode 2) Control Signal. This pin may be
configured to output (Master Mode) or as an input (Slave Mode) and accept these
control signals.
BLANKI/OVideo Blanking Control Signal. The pixel inputs are ignored when this is Logic Level "0."
This signal is optional.
SCRESET/RTCIThis pin can be configured as an input by setting MR42 and MR41 of Mode Register 4. It
can be configured as a subcarrier reset pin, in which case a low-to-high transition on this
pin will reset the subcarrier phase to Field 0. Alternatively it may be configured as a Real-
Time Control (RTC) Input.
VREFI/OVoltage Reference Input for DACs or Voltage Reference Output (1.235 V).
RSET1IA 150 resistor connected from this pin to GND is used to control full-scale amplitudes of
the Video Signals from DACs A, B, and C (the "large" DACs).
RSET2IA 600 resistor connected from this pin to GND is used to control full-scale amplitudes of
the Video Signals from DACs D, E, and F (the "small" DACs).
COMP1OCompensation Pin for DACs A, B, and C. Connect a 0.1 uF Capacitor from COMP to
VAA . For Optimum Dynamic Performance in Low Power Mode, the value of the
COMP1 capacitor can be lowered to as low as 2.2 nF.
COMP2OCompensa tion Pin for DACs D, E, and F. Co nnecapacitor from COMP to Vt a 0.1 uF CAA.
DAC AOGREEN/Composite/Y Analog Output. This DAC is capable of providing 34.66 mA output.
DAC BOBLUE/S-Video Y/U Analog Output. This DAC is capable of providing 34.66 mA output.
DAC CORED/S-Video C/VAnalog Output. This DAC is capable of providing 34.66 mA output.
DAC DOGREEN/Composite/Y Analog Output. This DAC is capable of providing 8.66 mA output.
DAC EOBLUE/S-Video Y/U Analog Output. This DAC is capable of providing 8.66 mA output.
DAC FORED/S-Video C/V Analog Output. This DAC is capable of providing 8.66 mA output.
SCLOCKIMPU Port Serial Interface Clock Input.
SDATAI/OMPU Port Serial Data Input/Output.
CLAMPOTTL Output Signal to external circuitry to enable clamping of all video signals.
PAL_NTSCIInput signal to select PAL or NTSC mode of operation, pin set to Logic "1" selects PAL.
VSOO VSO TTL Output Sync Signal.
CSO_HSOODual Function CSO or HSO TTL Output Sync Signal.
ALSBITTL Address Input. This signal sets up the LSB of the MPU address.
RESET IThe input resets the on-chip timing generator and sets the ADV7172/AD173 intoV7
default mode. This is NTSC operation, Timing Slave Mode 0, DACs A, B, and C powered
OFF, DACs D, E, and F powered ON, Composite and S-Video out.
TTXITeletext Data Input Pin.
TTXREQOTeletext Data Request output signal used to control teletext data transfer.
VAAPPower Supply (3 V to 5 V).
GNDGGround Pin. |
ACEC
INTEGRA
