DVF-3060/3060-S/3060K-S
CIRCUIT DESCRIPTION
2-2 HEX Inverter (Single Stage) : M74HCU04(IC51)Truth Table
Pin No.Pin NameI/O Pin DescriptionAQ
1,3,5,9,11,13A0 to A5IData InputsLH
2,4,6,8,10,12Q0 to Q5OData OutputsHL
7GND-Ground
14VCC-Positive Supply Voltage
2-3 Flash Memory : M29W 800AT
Pin No.Pin NameI/OPin Description
1~8A15~A8IAddress Inputs
9,10N.C.-Unused
11WE-Write Enable
12RP-Reset/Block Temporary Unprotect
13,14N.C.-Unused
15RY/BYOReady/Busy/Output
16,17A18,A17IAddress Inputs
18~25A7~A0IAddress Inputs
26CE-Chip Enable
27,46VSS-Ground
28QE-Output Enable
29~36
DQ0~DQ15I/O Data Input/Outputs, Command Inputs
38~45
37VCC-Supply Voltage
45DQ15I/O Data Input/Outputs or Address input
47BYTE-Byte/Word Organization
48A16IAddress Inputs
2-4 DC Motor Driver : KA8082(IC23)
Pin No.Pin NameI/OPin Description
1GND-Ground
2VO1OOutput 1
3VCTLIMotor speed control
4VIN1IInput 1
5VIN2IInput 2
6SVCC-Supply voltage (Signal)
7PVCC-Supply voltage (Power)
8VO2OOutput 2
2-5 64 Bit SDRAM : HY57V641620HGT
Pin No.Pin NameI/OPin Description
1,14,27,VCC-Power supply for internal circuits and input buffers.
2,4,5,7,8,10
11,13,42,44 45,DQ0~DQ15I/OMultiplexed data input/output pin.
47,48,5051,53
3,9,43,49VCCQ-Power supply for output buffers.
6,12,46,52VSSQ-Ground for output buffer.
15,39LDQM,UDQMI/OControls output buffers in read mode and masks input data in write mode.
16,17,18WE,CAS,RAS-WE, CAS and RAS define the operation.
19CS-Enables or disables all inputs except CLK, CKE, and DQM.
Selects bank to be activated during RAS activity.
20,21BA0,BA1-
Selects bank to be read/written during CAS activity.
22,23~26A10, A0~A3
-Address bus : A0~A11
29~34,35A4~A9, A11
28,41,54VSS-Ground for internal circuits and input buffers.
36,40NC-Unused.
Controls internal clock signal and when deactivated, the SDRAM will be
37CKE-
one of the states among power down, suspend or self refresh.
The system clock input. all other inputs are registered to the SDRAM on
38CLKI
the rising edge of CLK.
7 |
ACEC
KENWOOD
