CP830F Service Manual
5.2.2 VISION IF AMPLIFIER
The video IF signal (VIF) is fed through a SAW filter to the differential input (Pin 6-7) of the VIF
amplifier. This amplifier consists of three AC-coupled amplifier stages. Each differential amplifier
is gain controlled by the automatic gain control (VIF-AGC). The output signal of the VIF amplifier
is applied to the FPLL carrier generation and the video demodulator.
SAW filters
Ref.StandardFeatures
K3953MB/G - D/K - I - L/L IF filter for video application
TV IF filter with Nyquist slopes at
33.9 MHz and 38.9 MHz
Constant group delay
K9650MB/G - D/K - I - L/L IF filter for audio application
TV IF audio filter with two channels
Channel 1 (L) with one pass band
for sound carrier at 40.40 MHz
Channel 2 ( L, D/K, I, B/G) with one
pass band for sound carriers
between 32.40 MHz and 33.40 MHz
5.2.3 TUNER-AND VIF-AGC
At Pin 8, the VIF-AGC charges/discharges the AGC capacitor to generate a control voltage for setting the gain of the
VIF amplifier and tuner in order to keep the video output signal at a constant level. Therefore, in the case of all negative
modulated signals (e.g., B/G standard) the sync. level of the demodulated video signal is the criterion for a fast
charge/discharge of the AGC capacitor. For positive modulation (e.g., L standard) the peak white level of video signal
controls the charge current. In order to reduce reaction time for positive modulation, where a large time constant is
needed, an additional black level detector controls the discharge current in the event of decreasing VIF input signal.
The control voltage (AGC voltage at Pin 8) is transferred to an internal control signal, and is fed to the tuner AGC to
generate the tuner AGC current at Pin 11 (open collector output). The take over point of the tuner AGC is adjusted at
Pin 10 by an external dc voltage from microprocessor. A PWM output from microcontroller is low pass filtered for this
AGC control. See also AGC adjustment for details on how to align TOP in SERVICE mode.
5.2.4 FPLL, VCO AND AFC
The FPLL circuit (frequency phase locked loop) consists of a frequency and phase detector to generate the control
voltage for the VCO tuning. In the locked mode, the VCO is controlled by the phase detector and in unlocked mode, the
frequency detector is superimposed. The VCO operates with an external resonance circuit (L and C parallel) and is
controlled by internal varicaps. The VCO control voltage is also converted to a current and represents the AFC output
signal at Pin 22. At the AFC switch (Pin 19) three operating conditions of the AFC are possible: AFC curve risingor
fallingand AFC off. A practicable VCO alignment of the external coil is the adjustment to zero AFC output current
at Pin 22. At center frequency the AFC output current is equal to zero. Furthermore, at Pin 14, the VCO center
frequency can be switched for setting to the required Lvalue (Lstandard). The optional potentiometer at Pin 26
allows an offset compensation of the VCO phase for improved sound quality (fine adjustment). Without a potentiometer
(open circuit at Pin 26), this offset compensation is not active. The oscillator signal passes a phase shifter and supplies
the in-phase signal (?) and the quadrature signal (9?)of the generated picture carrier.
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ACEC
