MITAC 8350 Repair Manual

83508350 N/B MN/B Maaintenanceintenance
5.3 ULI M1573M South Bridge(8)
CPU Interface CPU Interface (Continued)
Pin Name I/O Type Description Pin Name I/O Type Description
P4 Mode Interface P4 Mode Interface
A20M# / O CPU A20 Mask. STPCLK#/ O Stop CPU Internal Clock Request.
RUNGPO[12] This is the CPU Address line A20 mask signal. It can be RUNGPO[22] This signal is used to make CPU enter power saving mode and
configured as RUNGPO. stop the CPU internal clock. The signal should be connected to
CPUHI# (Mobile Only) O CPU High/Low Performance Selection. CPU STPCLK# input. It can be configured as RUNGPO.
/ This signal is used to select the CPU high/low performance and A20GATE/ I A20 Gate.
RUNGPO[13] can be optionally configured as RUNGPO. RUNGPI[15] This pin is the external Keyboard A20 gate signal and can be
CPUPWG/ O CPU Power Good. configured as RUNGPI.
RUNGPO[14] This signal is connected to the PWRGOOD input of CPU and KBCRC#/ I Keyboard RC.
can be optionally configured as RUNGPO. RUNGPI[16] This pin is the external Keyboard RC signal and can be
CPURST#/ OD CPU Cold Reset. configured as RUNGPI.
RUNGPO[32] When system is powered on, this reset signal will be asserted HTT Interface
and become de-asserted until 4 ms after HTTPWROK becomes
HTTSTOP#/ OD HyperTransport Stop
high. This pin can be configured as RUNGPO.
RUNGPO[31] This output signal is used to enable and disable HyperTransport
DSLEEP#/ O CPU Deep Sleep. links during C3/C4 state or system power saving state
RUNGPO[15] This signal is used to force CPU entering deep sleep state. This
transitions. This output
signal can be configured as RUNGPO. should be externally pulled high as 2.5V with 10K resistor. This
FERR# I Floating Point Error. pin can be configured as RUNGPO.
FERR# input from coprocessor to generate IRQ13.
HTTRESET#/ OD HyperTransport Reset
IGNNE#/ O Ignore Error. RUNGPO[30] This output signal is used to reset the HyperTransport chain.
RUNGPO[16] This pin is used as the ?ignore numeric coprocessor error? This output should be externally pulled high as 2.5V with 10K
signal and connects to CPU. It can be configured as RUNGPO.resistor. This pin can be configured as RUNGPO.
INIT#/ O CPU Initialization. HTTPWROK/ OD HyperTransport Power OK.
RUNGPO[17] This signal will be asserted for 16 PCI clocks when M1573 RUNGPO[29] This output signal is used by a HyperTransport device to
resets the CPU. It can be configured as RUNGPO. indicate that the power and clocks are stable. This output should
INTR/ O Interrupt Request to CPU. be externally pulled high
RUNGPO[18] This is the interrupt signal generated by the internal 8259 and as 2.5V with 10K resistor. This pin can be configured as
should connect to CPU INTR as a maskable interrupt. It can be RUNGPO.
configured as

RUNGPO.
NMI/ O Non-Maskable Interrupt to CPU.
RUNGPO[19] This is generated by the PCI Parity error or SERR# assertion,
and the other internal error event. This output should connect to General Purpose I/O
CPU NMI as a Pin Name I/O Type Description
non-maskable interrupt. It can be configured as RUNGPO.
RUNGPIO[3:0]/ IO General-Purpose Input/Output.
SLEEP#/ O CPU Sleep.
RUNGPI[3:0]/RUNGPThese pins can be configured as RUNGPI[3:0](default) or
RUNGPO[20] This signal is used to force CPU entering sleep state. This signal
O[3:0] RUNGPO[3:0].
can be configured as RUNGPO.
RSMGPIO[3:0]/ IO Resume Region General-Purpose Input/Output.
SMI#/ O System Management Interrupt.
RSMGPO[3:0]/RSMGPThese pins can be configured as RSMGPI[3:0] or
RUNGPO[21] This signal should be connected to CPU SMI# input. It can be
I[3:0] RSMGPO[3:0](default).
configured as RUNGPO.
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