CR-305X
Terminal description
PinPin
SymbolI/O DescriptionSymbolI/O Description
No.No.
1 FEO O Focus error amplifier output. 26 SENS2O Outputs DFCT2, MIRR, BALL, TGL, FOL, and
Connected internally to the window comparator input others according to the command from the CPU.
for bias adjustment.
27 FOKO Focus OK comparator output.
2 FEI I Focus error input.28 CC2I Input for the defect bottom hold output with capa-
3FDFCT I Capacitor connection pin for defect time constant.citance coupled.
4FGD I Ground this pin through a capacitor for cutting the 29 CC1O Defect bottom hold output. Connected internally to
focus servo high-frequency gain.the interruption comparator input.
5 FLBIExternal time constant setting pin for boosting the 30 CBI Connection pin for defect bottom hold capacitor.
focus servo low-frequency.31 CPIConnection pin for MIRR hold capacitor.
6 FE_OO Focus drive output.MIRR comparator non-inverted input.
7 FE_MIFocus amplifier inverted input.32 RF_IIInput for the RF summing amplifier output with capa-
8 SRCHIExternal time constant setting pin for generating citance coupled.
focus search waveform.33 RF_OORF sunning amplifier output. Eyepattern check point.
9 TGUIExternal time constant setting pin for switching track-34 RF_MIRF summing amplifier inverted input.
ing high-frequency gain.The RF amplifier gain is determined by the resistance
connected
10 TG2IExternal time constant setting pin for switching track-
ing high-frequency gain.between this pin and RFO pin.
11 FSETIPeak frequency setting pin for focus and tracking 35 RFTCI External time constant setting pin during RF level
phase compensation amplifier.control.
12 TA_MITracking amplifier inverted input.36 LDO APC amplifier output.
13 TA_OO Tracking drive output.37 PDIAPC amplifier input.
14 SL_PISled amplifier non-inverted input.38 PD1IRF I-V amplifier inverted input. Connect these pins
15 SL_MISled amplifier inverted input.39 PD2Ito the photo diode A + C and B + D pins.
16 SL_OO Sled drive output.40 FE_BIAS I Bias adjustment of focus error amplifier.
17 ISETIConnect an external capacitance to set the currentLeave this pin open for automatic adjustment.
which determines the Focus search, Track jump, and41 FI F I-V and E I-V amplifier inverted input.
Sled kick heights.42 EI Connect these pins to photo diodes F and E.
18 VCCIPositive power supply.43 EI? I-V amplifier E gain adjustment.
19 LOCKIThe sled overrun prevention circuit operates when (When not using automatic balance adjustment)
this pin is Low. (no pull-up resistance)44 VEE? Negative power supply.
20 CLKISerial data transfer clock input from CPU. 45 TEOO Tracking error amplifier output. E-F signal is output.
(no pull-up resistance)46 LPFII Comparator input for balance adjustment.
21 XLTILatch input from CPU. (no pull-up resistance)(Input from TEO through LPF)
22 DATAISerial data input from CPU. (no pull-up resistance)47 TEII Tracking error input.
23 XRSTIReset input; resets at Low. (no pull-up resistance)48 ATSCI Window comparator input for ATSC detection.
24 C. OUTO Track number count signal output.49 TZCITracking zero-cross comparator input.
25 SENS1O Outputs FZC, DFCT1, TZC, BALH, TGH, FOH, 50 TDFCTI Capacitor connection pin for defect time constant.
ATSC, and others according to the command from 51 VCO (VCC + VEE)/2 direct voltage output.
CPU.I
52 FZCFocus zero-cross comparator input.
9Å® 11 9Å® |
ACEC
