1-26. Circuit Description
1-26-6. Servo Control System
1-26-7. RF System
MDR-14 board1-26-7. RF System (EQ-88 Board)
The MDR-14 board consists of the drum drive PWM
amplifier, the drum PG waveform shaping circuit and the. During record mode
FG waveform shaping circuit.The two channel standard-drum-diameter recording data in
The drum motor drive PWM driver amplifier consists ofwhich ECC is added in the DVP-18 board, are converted to
the PWM amplifier (PWM module IC (IC2) and switching8-channel data for the small diameter drum at the RING
FET (Q1)) and the 3-phase motor driver (IC1). The drum(IC201) and modulated into BI-PHASE signal at the REC
motor drive PWM signal is supplied from the SS CPUdriver (IC302, IC410). The output of the REC driver is
(IC1) of the SS-92 board, amplified by this driver andsent to the head drum.
drives the head drum motor.At the same time the CPU controls such as the record
The drum PG/FG amplifier consists of the PG/FG amplifi-current control for the REC amplifier/PB amplifier inside
er module IC (IC4). The FG/PG analog signal output fromthe drum. The RF alarm detection is also performed by
the drum motor is amplified by IC4, waveform-shaped to adetecting the playback RF level.
rectangular wave and is sent to the SS CPU (IC1) of theThe control signals for the drum are prepared as MPX
SS-92 board that performs the servo control of the drumdata/clock signals by the MPX ENCODER (IC101), and
motor.are sent via the MDR-14 board to the drum board (UDR-
32 board), where they are decoded by the MPX DECOD-
ER (IC3) and are supplied to the respective REC amplifiers
and the PB amplifiers.
. During playback mode
The 8-channel playback RF signal is amplified and A/D-
converted by the Read Channel (IC501, IC601, IC701,
IC801, IC1501, IC1601, IC1701 and IC1801), and is
output as 6-bit data.
After that, the 8-channel playback RF signal receives
Viterbi decoding, sync signal detection, inner error correc-
tion and descramble at the EDEN (IC901, IC1001). Then
the data is output to the DVP-18 board.
. Setting and adjusting data
The RING (IC201) data, the Read Channel (IC501, IC601,
IC701, IC801, IC1501, IC1601, IC1701, IC1801) data and
the EDEN (IC901, IC1001) data are set by the EQ CPU
(IC1101) that enables the complete automatic adjustment
of the record RF system and the playback RF system.
1-70HDW-750 V1 |
ACEC
