CIRCUIT DESCRIPTION
1) Receiver System
The receiver system is a double superheterodyne system with a 21.7MHz first IF and
a 450kHz second IF.
1. Front End
The signal from the anntena is pssed through low-pass filter and input to RF coil L24
and L17(band pass filter).
The signal from L24 and L17 is amplified by Q9,Q10 and led to the band pass filter,
and let to the first mixer base of Q11.
2. First Mixer
The amplified signal (f0) by Q9,Q10 is mixed eith the first local oscillator signal(f0-21.7MHz)
from the PLL circuit by the first stage mixer Q11 and so is converted into the first IF signal.
The unwanted frequency band of the first IF signal is eliminated by the monolithic
crystal filter FL3,and led to IF amplifier Q8.
3. IF Circuit
The first IF signal is amplified by Q8, and input to pin 16 of IC3, where it is mixed withthe
second local oscillator signal(21.25MHz)and so is converted into the second IF signal(450kHz).
The second IF signal is output from pin3 of IC3, and unwanted frequency band of second IF
signal is eliminated by a ceramic filter FL2.
The resulting signal is then amplified by the second IF limiting amplifier, and detected
by quadrature circuit. the audio signal is output from pin9 of IC3
4.Audio Circuit
The demodulated signal in IF IC3 contains the audio signal and CTCSS signal .
CTCSS signal is passed through the low-pass filter of IC5 and led to TIN port of CPU
to be decoded. The audio signal is input to the main volume VR3 passing through
de-emphasis circuit and high-pass filter circuit of Q19.The signal of which level is
adjusted at the main volume VR3 is input to IC6 of AF amp, then it is amplified to the
level that can drive the speaker.
5.Squelch Circuit
The noise in the audio signal from IC3 is passed through the noise-filter and input to pin8 of IC3.
IC3 includes filter amplifier,high-pass filter and rectifier.
The rectified voltage level from pin14 of IC3 is deliverd to the comparator of the CPU.
The voltage is led to pin1 of CPU and compared with the setting voltage.The squelch
will open if the input voltage is lower than the setting voltage.
During open squelch ,pin11(AFS)of CPU becomes?H?level and pin9(AFP)of CPU
becomes?L?level, AF control signal is being controlled and sounds is outputted from
the speaker.
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ACEC
